Ambarella
Sr. ASIC Design Engineer
Job Location
Parma, Italy
Job Description
Overview We’re growing! Our team in Parma (Italy) is seeking a Sr. ASIC Design Engineer. Responsibilities Developing micro-architecture specifications for a next generation Computer Vision processor; Designing and implementing video compression logic, image processing logic, and computer vision processors in Verilog and SystemVerilog; Design integration, logic synthesis, and design optimization for timing, area and power; Developing front-end methodologies and tool flows; Participating in chip bring-up and testing; Qualifications As an Equal Opportunity/Affirmative Action Employer, Vislab and Ambarella recruit qualified applicants without regard to race, color, national origin, sex, physical disability, or veteran status. Please find at this link our privacy disclaimer dedicated to candidates data, accordingly to the GDPR: J-18808-Ljbffr
Location: Parma, Emilia-Romagna, IT
Posted Date: 9/17/2025
Location: Parma, Emilia-Romagna, IT
Posted Date: 9/17/2025
Contact Information
| Contact | Human Resources Ambarella |
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