Senior Verification Engineer

About the Role Join a fast-growing European semiconductor company developing customizable high-performance RISC‑V cores with vector/tensor acceleration and proprietary high-bandwidth memory IP . You'll lead RTL verification for next-gen AI/ML compute platforms. Key Responsibilities: Develop and execute UVM-based testbenches for complex IP and SoCs Apply formal and dynamic verification techniques Drive coverage analysis, regressions, and debug Collaborate closely with design and architecture teams Automate verification workflows (Python, Bash, Tcl) Requirements: Master’s or PhD in EE/CS 5–8 years in digital verification (SystemVerilog/UVM) Strong scripting and simulation tool experience Fluent English (C1) Team player with excellent problem-solving skills Nice to Have: RISC-V core or SoC verification experience Knowledge of vector/tensor compute or memory architectures

Location: Catalonia, ES

Posted Date: 8/2/2025