JR Italy

R&D – Head of Embedded NVM Technologies

Job Location

treviso, Italy

Job Description

Social network you want to login/join with: R&D – Head of Embedded NVM Technologies, Treviso Client: Theron Solutions Location: Treviso Job Category: Other EU work permit required: Yes Job Reference: 4287033516446711808337115 Job Views: 2 Posted: 26.04.2025 Expiry Date: 10.06.2025 Job Description: THIS ROLE REQUIRES A RELOCATION TO DHOLERA, INDIA once the FAB is built. Responsibilities: Integration responsibilities to add eNVM (embedded Non Volatile Memory) Features to 28 110nm platform technologies including MTP and Flash. Work with IP providers, as needed, to implement these features. Design and Layout of test chips to aid in device/technology optimization, reliability assessment, and SPICE model extraction. End-to-end Project Management from initial project justification to final qualification and yield ramp, with responsibilities for achieving desired performance, quality/yield, schedule, and cost targets. Build and lead a cross-functional team across diverse geographies. Build strong customer relationships based on confidence in the company's technical capabilities. Conduct competitor benchmarking; own the technology roadmap. Present to internal and customer senior executives. Possible involvement in OTP development. Travel (few weeks per quarter). Additional qualities: Ability to manage, mentor, and lead a team of highly motivated professionals. Able to work independently, self-motivated with a strong drive to win. Team player with the ability to work across diverse cross-functional teams spread across the world. Leadership skills to influence all levels of the organization. Inclusive, adaptable to various cultural norms. Curious and resilient, approaching challenges with data-driven understanding. Collaborative, building relationships and supporting others. Innovative and creative, proactively exploring new ideas and adapting quickly. Qualifications: M.S or PhD in Electrical Engineering, Materials Science or equivalent. Strong understanding of CMOS and eNVM device physics, process modules, yield improvement, failure mechanisms, analytical techniques (physical and electrical). Deep understanding of key eNVM technologies (charge trap, floating gate, RRAM, MRAM, etc.). Understanding of technology parameters and figures of merit (bit cell size, macro size, endurance, retention, power, latency, mask count, etc.); experience in achieving competitive performance. Proven track record in delivering these technologies into volume manufacturing. Ability to lead cross-functional teams and achieve project completion within timeline and cost targets. Ability to work across different cultures and geographies. Good team player. Innovation and competitive mindset. Desired Experience Level: 15 years of experience in the semiconductor industry. Proven track record of successfully developing new technologies into high-volume production. Proven problem-solving skills using design of experiments and analytical tools. EOE: Our client is an Equal Opportunity Employer and prohibits discrimination and harassment of any kind. We are committed to providing a work environment free of discrimination and harassment. Employment decisions are based on business needs, job requirements, and individual qualifications, without regard to race, color, religion, sex, age, disability, sexual orientation, gender identity, marital status, military service, family medical history, or any other protected characteristic. J-18808-Ljbffr

Location: treviso, IT

Posted Date: 5/1/2025
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JR Italy

Posted

May 1, 2025
UID: 5167822579

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